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Runtime hardware reconfiguration

Urban Škvorc (2017) Runtime hardware reconfiguration. MSc thesis.

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    Runtime hardware reconfiguration allows developers to change a part of an FPGA system while it is running. This method of reconfiguration provides several advantages. These include reducing the space consumption of a FPGA system or increasing configuration speed. Another benefit is the ability of such a system to repair certain errors while it is running. In this thesis, we will first describe runtime reconfiguration and its advantages. FPGA systems that use runtime reconfiguration share several features. These include a non-changing static part that is in charge of the reconfiguration process, as well as of communicating with other system components. The main part of the thesis will be focused on the development of a hardware platform that aims to provide developers with some of those shared features. In addition to allowing runtime reconfiguration, the developed platform also provides support for the PCIe bus, which allows the FPGA system to be used as a coprocessor in a larger hardware system. Specifically, the developed platform includes a driver and software applications that allow the FPGA system to be used as a coprocessor in a computer system running the Ubuntu operating system.

    Item Type: Thesis (MSc thesis)
    Keywords: FPGA, Computer circuits, Reconfiguration
    Number of Pages: 68
    Language of Content: Slovenian
    Mentor / Comentors:
    Name and SurnameIDFunction
    izr.prof. dr. Patricio Bulić255Mentor
    doc. dr. Anton BiasizzoComentor
    Link to COBISS: http://www.cobiss.si/scripts/cobiss?command=search&base=51012&select=(ID=1537602755)
    Institution: University of Ljubljana
    Department: Faculty of Computer and Information Science
    Item ID: 3995
    Date Deposited: 04 Oct 2017 15:36
    Last Modified: 19 Oct 2017 09:07
    URI: http://eprints.fri.uni-lj.si/id/eprint/3995

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