Martin Artnik (2013) IMAGE FILTERING IN FPGAS. EngD thesis.
Abstract
Convolution kernels are frequently used for image processing and analysis. They can be used to apply different filters on images. These filters can serve either an esthetic purpose (for example, to sharpen or blur an image), or they can be a useful tool for image analysis, a common example of which is edge detection. There are many implementations of convolution of an image with a convolution kernel. They can be software implementations, which runs on a desktop computer, or they can be implemented in hardware. Hardware implementations are useful in cases, when we need speed and are working with large sets of data. These kinds of implementations are common in various embeded systems. The goal of our thesis was to implement convolving an image with a convolution kernel in the VHDL language, for use on the Xilinx FPGA platform Virtex-6. The implementation enables us to use a 3$\times$3 size convolution kernel of our choice on images the size of 128$\times$128 8-bit pixels. For demonstrating the use of our main image processing unit, we have linked it to block RAM and a UART serial interface, which we use to send and recieve data. We also implemented a simple block RAM controller, which enables easier modification of our logic for use with various memory controllers. We first tested our implementation on a simulator and later also on the Xilinx Virtex-6 development board itself. The implementation is ready for modification for use with various memory controllers and also enables simple modification for use with different image sizes.
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