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FPGA implementation of basic pipeline encoder of video codec Daala

Peter Kragelj (2016) FPGA implementation of basic pipeline encoder of video codec Daala. MSc thesis.

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    Abstract

    Almost everyone in the world uses video compression many times each day - whether when watching show on TV, clips on the Internet or movies at the cinema. So it is not a surprise that through the history of computer science a number of different video codecs have been developed, each bringing some novel approaches to video processing. Daala video codec is one of the newest video codecs still in development. It is important as it uses nonstandard algorithms for video processing. It uses the Haar transform and the DCT lapped transform for crossing into frequency domain and type of arithmetic coding for coding of output data. In this work a hardware implementation of basic pipeline of video codec Daala has been developed. The aim of this work was to study possibilities of such implementation and to find possible shortcomings. Implementation has been prepared for FPGA chip where it was tested. The implementation has been finalized and has been found to use appropriate number of FPGA resources, but does not meet intended speed because of sub-optimal implementation. It has been showen that basic pipeline of video codec Daala is appropriate for usage in FPGA chips as it does not use building blocks that are impossible to implement in hardware. It has been also showen that there are some limitations. Algorithms need full data of the whole superblock to function, so all data need to be stored for each step of the pipeline. Video codec Daala is still in development and such not appropriate for the general usage as some functions of the codec are not working. Splitting of superblock into blocks is not working if RDO optimization is disabled as current development is using this optimization. Development of arithmetic coding is also not finished because of this large number of compression methods that are available and which complicate implementation. This implementation of basic pipeline of video codec Daala confirms possibility of its practical implementation and is a first step to full and more optimized implementation that would be appropriate for general usage.

    Item Type: Thesis (MSc thesis)
    Keywords: basic pipeline, encoder, video, Daala, implementation, Haar transform, arithmetic coding
    Number of Pages: 136
    Language of Content: Slovenian
    Mentor / Comentors:
    Name and SurnameIDFunction
    prof. dr. Branko Šter283Mentor
    Link to COBISS: http://www.cobiss.si/scripts/cobiss?command=search&base=51012&select=(ID=1537131203)
    Institution: University of Ljubljana
    Department: Faculty of Computer and Information Science
    Item ID: 3506
    Date Deposited: 05 Sep 2016 19:01
    Last Modified: 22 Sep 2016 10:07
    URI: http://eprints.fri.uni-lj.si/id/eprint/3506

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